1. Field of the Invention
The present invention relates in general to the field of computer systems, and more particularly, to a method and apparatus of providing alternate access to registers in peripheral devices within a computer system.
2. Description of Related Art
In a typical computer system that provides power management services, the state of the system is typically saved before power is suspended. The state of the system is restored following a command for a system resume. Such a power management scheme provides a fast resume process and eliminates the need for reinitialization of system parameters such as control and status information and initialization values in registers of peripheral devices.
Peripheral devices (e.g., interrupt controllers, direct memory access controllers, timers) used in a computer system typically include a number of read-only and write-only registers. These registers contain control or status information used for system operation. In many cases, a read-only register and a write-only register may correspond to the same address. Accessing to this same address results in different context depending on whether the access is a read or a write. The contents of these registers have to be saved before the power is suspended and are restored when power is restored.
Conventional techniques for saving and restore the contents of these registers fall into two categories: a hardware approach and a software approach. Approaches in hardware typically involve the use of a battery back-supply for low-power devices or shadow registers. Software approaches typically involve monitoring of the read-only and write-only registers such as continuous polling for read only registers or keeping written copies for write-only registers.
The use of a battery back-up supply requires that the components be fabricated using low power technologies such as Complementary Metal Oxide Semiconductor (CMOS) in a battery back-up environment. When power from the main power is suspended, the back-up power supply is activated while the devices are placed in standby mode. A battery is used to provide the necessary power to keep the contents of these devices intact. There are several disadvantages with this technique. First, the devices have to be fabricated with CMOS technology which may be expensive especially when these devices are integrated with other devices. Second, the design of a system implementing a back-up power supply is complex and expensive.
The use of a shadow register requires the implementation of additional registers which occupy different addresses. The additional registers provide increased accessibility. The disadvantages of this technique include increased device complexity and increased address space.
Software techniques typically involve monitoring of the contents of the read-only and write-only registers. Special programs must be developed to constantly keep track of these contents. This requirement prevents the use of standard software packages. For read-only registers, the contents may be continuously polled to save the status. This polling creates a burden to the processor and the contents may not reflect the actual final values of the registers. For write-only registers, the values to be written are additionally kept separately, either as part of the program or in another more easily accessible storage location. This requires extra effort and additional hardware.
Accordingly, there is a need in the technology to provide an apparatus and method for an alternate access mechanism for the saving and restoring of register contents in a power management environment without increasing hardware complexity or requiring software modification.
The present invention relates to a method and apparatus for restoring a status data in a computer system. The circuit comprises: a read-only register for storing a read-only status value during a normal mode of operation; a first data path for supplying the read-only status value; a first control signal path for supplying a first control signal for controlling writing the supplied read-only status value into the read-only register during the normal mode of operation, the stored read-only status value being saved into a save area prior to removing power from the read-only register; a second data path for subsequently re-supplying from the save area the previously stored read-only status value; a second control signal path for supplying a second control signal for controlling restoration of the re-supplied read-only status value into the read-only register during a restore mode of operation; and circuitry coupling the first and second data and control signal paths to the read-only register to facilitate the writing during the normal mode of operation and the restoration during the restore mode of operation.